1. Field of the Invention
The present invention generally relates to an interface circuit for a fiber transceiver and, more particularly, to an interface circuit for a fiber transceiver that is able to reduce the number of I/O pads for receiving a detection differential signal.
2. Description of the Prior Art
FIG. 1 is a schematic block diagram showing a conventional interface circuit for a fiber transceiver. As shown in the figure, when a fiber transceiver is used for receiving a fiber signal, such as a 100 Base-Fx protocol signal, an electronic signal output from a fiber transceiver 11 is received by an electronic signal transceiver 10. The fiber transceiver 11 is connected to fibers 12 and 13, and converts two output differential signals TxP and TxN into an output optic signal Tx. The fiber transceiver 11 also converts an input optic signal Rx into two input differential signals RxP and RxN and two detection differential signals SDP and SDN. The electronic signal transceiver 10 receives the differential signals RxP, RxN, SDP, and SDN from the fiber transceiver 11, and further decodes the output data (data_out) into two differential signals TxP and TxN to be output to the fiber transceiver 11.
FIG. 2 is a control block diagram showing a part of the conventional electronic signal receiver 10 with its interface. As shown in the figure, two output differential signals TxP and TxT are generated by an output driving unit 103 after the output data (data_out) is encoded by an encoder 101. Two input differential signals RxP and RxN are input into an comparator 104 to generate an input signal, which is to be decoded by a decoder 102 to be an decoded data RxD. The decoded data RxD is converted an input data (data_in) according to a link signal L_S. Moreover, two detection differential signals SDP and SDN are input into an comparator 105 to generate the link signal L_S, so as to control the decoder 102. In other words, when a package data RX is input, the fiber transceiver 11 outputs the detection differential signals SDP and SDN such that the link signal L_S is enabled. Therefore, the decoder 102 outputs the decoded data RxD as an output data (data_in) according to the link signal L_S.
Generally, the higher integrity that I/O ports in the electronic signal receiver 10 has; for the example of 16 I/O ports, the more I/O pads on a chip of the electronic signal receiver 10 have. Therefore, the size of the electronic signal receiver 10 cannot be minimized, and the manufacturing cost cannot be reduced.